www.ti.comAnalogEngineer'sCircuitSlewRateLimiterCircuitCaelan(Zak)KayeDesignGoalsOutputSupplyInputViMaxVoMinVoMaxVccVeeVref10V–10V10VViMin15V–15V0V–10VDesignDescriptionThiscircuitcontrolstheslewrateofananaloggainstage.Thiscircuitisintendedforsymmetricalslewrateapplications.Thedesiredslewratemustbeslowerthanthatoftheopampchosentoimplementtheslewratelimiter.OpAmpGainStageSlewRateLimiterC1470nR11.69k+VccVeeVcc15IC1AVi-U1OPA192R21.6MEGVeeVee15+V+-U2OPA192Vee+Voa1V+VoVcc+RLoad10kVccDesignNotes1.Thegainstageop-ampandslewratelimitingopampshouldbothbecheckedforstability.2.VerifythatthecurrentdemandsforchargingordischargingC1plusanyloadcurrentoutofU2willnotlimi...
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